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SZG-DUALSFP Sample(s)
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9
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845
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December 30, 2024
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C# DLL Crashes when Power is Removed from Opal Kelly Front Panel
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10
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789
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March 20, 2025
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I/O planning failed while interfacing PORT C or D of LTC226x with XEM8320 board
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9
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685
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August 8, 2023
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Multiple pin assignments error
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1
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5668
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March 6, 2015
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Issues simulating VHDL project with ModelSim
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8
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7829
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January 13, 2009
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Loading okFrontPanel.dll in Matlab 64-bit
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0
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3845
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August 14, 2014
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Problem with "first" example, cannot find port hi_aa in okHost module
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6
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7231
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June 3, 2011
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FrontPanel support of Ubuntu 14.04 LTS
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6
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3921
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August 22, 2016
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PipeIn endian-ness
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2
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1634
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May 24, 2012
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RAMTester is failed with the recompiled ramtest.rbf
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8
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5280
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September 25, 2014
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Mutil-thread access to FrontPanel API
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7
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5023
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July 11, 2020
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XEM3001v2 configuration failed. done did not go high
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6
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5245
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February 13, 2012
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Vivado XEM7001 okCoreHarness : error generated from encrypted envelope
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5
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5252
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August 1, 2016
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Error in implement design
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6
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4496
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October 12, 2016
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Two critical question about block pipe out and its problem
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5
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3959
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April 26, 2016
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Python 3.4 ImportError: DLL load failed
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3
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4640
|
April 4, 2015
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DDR2 SDRAM interface doesn't work?
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8
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3056
|
November 22, 2013
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Setting I/O Voltages
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5
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3650
|
October 29, 2015
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XEM3005 FPGA configuration failed
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6
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3336
|
April 13, 2012
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LVDS and SLVS on XEM6310
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4
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3896
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February 8, 2017
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XEM6001 - okBTPipeOut buffering
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6
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3291
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November 13, 2014
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Python 2.7.8 (MAC) with FrontPanel 4.4.2
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7
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3061
|
May 8, 2015
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XEM6310 RAMTester problem!
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7
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3046
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November 28, 2016
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Problem updating/reading values on a WireOut
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7
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3014
|
February 17, 2014
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ReadFromBTPipeOut timeout?
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5
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3443
|
January 13, 2017
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ReadFromBlockPipeOut(...) times out on large reads
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8
|
2812
|
June 30, 2019
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Python 3.3 ImportError: DLL load Failed: The specifiied module could not be found
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1
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5862
|
July 18, 2014
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Matlab DLL call time
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3
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4137
|
April 23, 2014
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Synthesizing PipeTest in Vivado 2014.2
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4
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3679
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March 6, 2015
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Latest XEM6310-LX150 boards are not flashing
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3
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4112
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March 13, 2014
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C# PINVOKE error
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4
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3491
|
December 4, 2014
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XEM3001v2 recognized by front panel but First sample will not work
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8
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2589
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March 28, 2013
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Meaning of blocksize at ReadFromBlockPipeOut() in DLL
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6
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2761
|
June 22, 2009
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How to connect Chipscope?
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4
|
3240
|
March 26, 2009
|
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FP support for Xilinx Spartan-6 PCIe endpoint?
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8
|
2380
|
May 13, 2013
|
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LVDS Spartan3 VHDL
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3
|
3480
|
April 18, 2008
|
|
OK HOST - bus interfacing - vhdl vs verilog - different implementation - question
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3
|
3431
|
November 5, 2013
|
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EVB1006 Standard release documents needed
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|
0
|
1215
|
August 3, 2012
|
|
Labview interface with XEM6010
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6
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2539
|
August 21, 2012
|
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Controling multiple boards from one GUI
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6
|
2520
|
December 15, 2014
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BTPipeOut with FIFO
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3
|
3234
|
January 28, 2014
|
|
XEM6310 with USB3.0 Extender/Hub
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7
|
2279
|
February 25, 2016
|
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''LoadLibraryW' : cannot convert parameter 1 from 'char *' to 'LPCWSTR'
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5
|
2584
|
November 3, 2013
|
|
Windows 7 bluescreen issues
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5
|
2568
|
October 20, 2011
|
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Multiple devices - how to manage them coming and going
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5
|
2543
|
September 29, 2014
|
|
Are EEPROM bits accessable from the FPGA?
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5
|
2527
|
July 10, 2014
|
|
Problems loading okFrontPanel Library in Matlab
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5
|
2522
|
September 23, 2010
|
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.EASM file not readable by free Solidworks eDrawings program
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|
7
|
2169
|
October 4, 2011
|
|
How to generate *.bit file by myself?
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|
8
|
2025
|
August 14, 2008
|
|
Is there a risk of overheating?
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|
4
|
2706
|
December 26, 2015
|