is it really necessary to set the VCCO voltages to 2.5V to be able to use LVDS signals? Or would it also works to keep it like it is and use the LVDS_33 standard? I ran some tests using LVDS_33 and the output signals look ok as far as I can tell.
Also, we want to use SLVS inputs. The user manual says that it is possible to use externally applied input voltage thresholds. Would that also work for SLVS signals? According to Xilinx it is also possible to pull down the common voltage of a LVDS receiver to SLVS level (200 mV) simply using an external termination resistor (is it really that easy?).
Thanks in advance