SZG-DUALSFP Sample(s)

SYZYGY
1

Hi,

Is anybody using the SZG-DUALSFP daughter board for a 10 gigabit ethernet connection?

I have this board and am trying to get it to work with my Genesys Zynq UltraScale MPSoC+ board, I just don’t want to make a lot of ‘shots in the dark’ without at least finding some code samples.

Is it as simple as just wiring the connections as described in the documentation?

Thanks,

P.S. If I figure anything out I will post here as well.

2

Generally, just wiring things up is a good start for transceiver interfaces. We produced the iBERT captures using our Brain-1 (Brain-1 - Opal Kelly). We have not used the Genesys board with this peripheral.

The next step, however, depends a lot on the interface selected and so on. For example, Xilinx Aurora is pretty easy to setup and get running. But ethernet is a bigger project. Are you using the IP available from Xilinx?

3

I know its been a while but any updates on this ? Also there is mention of some SFP related code available online, can someone point where, I am trying to get an Ibert going over an XEM8350 board with a pluggable loopback on an extension optical cable in the XEM8350 Breakout board, any directions would be helpful.
Thanks

4

Getting a loop back going via IBERT is pretty easy. It really is plug and play with IBERT for the most part. Use the IBERT Ultrascale GTH IP core and follow through the menus, referring to the XEM8350’s documentation as needed for information on refclks and pinouts.

If you get stuck or confused, feel free to screenshot and post here with your question.

5

Thanks for the feedback !! Will keep that in mind.

6

Hey @hayden I was able to get it working with the QSFP but I wanted to see if its possible to access the I2C link on the SFP so that I can access the digital optical measurement statistics, I understand that this will need some custom stuff on the FPGA, let me know if you have any ideas.

7

If the pins are routed from the QSFP to the FPGA, then anything is possible. Opal Kelly even has an open source i2c controller!

Check the pins using our documentation, identify the voltage standard used, and add them to your constraints file. Then you need some gateware to complete the job.

1 Like
8

Jumping on this thread as I’m trying to do similar things.

Have the XEM8320 with the dual SFP+ cages. Plan is to stream data to SFP+ on a PC class workstation (Win or Linux).

Was initially thinking to stream using UDP to be more general. However, after the suggestion by @okSupport to look at Xilinx Aurora - that may be much more straightforward. Since it will be point top point anyway. It does mean that I’ll have to implement that SFP+ / PCIE as well on the PC box as well.

Is there any downside to using the SFP+ on the XEM8320? Is there an advantage to using the SZG-DUALSFP? Especially as I’ll need one on the receiving side?

Is Xilinx Aurora the obvious IP solution? Any other recommendations (or cautions)?

Thanks

9

The SZG-DUALSFP wasn’t really intended for the XEM8320 and isn’t compatible with the TXR4 ports on the XEM8320 anyway. The on-board SFP+ cages make this unnecessary if you just need two cages. The SZG-QSFP would be the choice for the TXR4 ports on the XEM8320.

Aurora is a nice, simple implementation that is great for point-to-point implementations. It’s not overblown with the complexities of other serial protocols.

10

Thanks @okSupport
That makes sense - the only reason that I looked at the SZG module was that it might(?) have more support or examples to work from.

Looks like Aurora is the way to go. Getting a second XEM8320 with the SZG-PCIEX4 for the receiving side to buffer incoming data to be pulled in by the PC.