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About the XEM8320 category
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1
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468
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October 20, 2022
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SZG-SENSOR working example on XEM8320
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3
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23
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August 17, 2025
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XEM8320 power up
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0
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23
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July 9, 2025
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Connections missing from board in Vivado
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1
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32
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March 6, 2025
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XEM8320-AU25P Choosing Ethernet IP for onboard SFP cages
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0
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63
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August 19, 2024
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How to configure sma connection with fpga pins for reading external ttl pulses
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0
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228
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January 19, 2024
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Clock problem while running all the 6 channels of XEM8320 board using LTC226x-14 bit ADC
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0
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226
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December 8, 2023
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How to increase the Pipe transfer rate on USB 3.0 for XEM8320
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0
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257
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November 10, 2023
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Complications in running all the three SYZYGY ports (A,B and C) together while attaching with XEM8320
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1
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303
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November 9, 2023
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STARTUPE3 AXI QUAD SPI sample work
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0
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487
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October 31, 2023
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Setting ftdi layout_init in an OpenOCD configuration for the XEM8320
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0
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915
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August 16, 2023
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I/O planning failed while interfacing PORT C or D of LTC226x with XEM8320 board
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9
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667
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August 8, 2023
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PORT-C in XEM8320 is not giving the same waveform as PORT-A and PORT-B
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1
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468
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August 4, 2023
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Real time data transmission through PORT-A and PORT-B of XEM8320 board at a time
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1
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334
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July 5, 2023
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Program on FIFO
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2
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537
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March 27, 2023
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XEM8320 fabric_refclk_c not connected in schematics
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1
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498
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February 6, 2023
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Python is not giving any plot for adc_read.py
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1
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477
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February 3, 2023
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About okfrontpanel.dll file
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1
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408
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February 3, 2023
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SMA transceiver issue with IBERT test
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0
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555
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December 21, 2022
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XEM8320-AU25P FPGA in the loop using Matlab
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0
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471
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September 30, 2022
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XEM8320-AU25P : Are the PINs on SYZYGY interface configurable?
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1
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491
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September 12, 2022
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XEM8320-AU25P datasheet needed
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4
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626
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September 9, 2022
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Xilinx Artix UltraScale+ FPGA development board with FMC
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1
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728
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March 22, 2022
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