XEM8320-AU25P : Are the PINs on SYZYGY interface configurable?


We would like to interface XEM8320-AU25P eval board to another different supplier’s Evaluation board which has the similar interfacing connector. But the PINs are not assigned the same way on both side, at least from the first observation of PINs.

We will use MIPI Tx in XEM8320-AU25P side and want to use PORTA to send the data. my question is:

  • Are the differential pins assigned on these ports configurable? or these are fixed for the MIPI interface?

Thank you.

The connector pins are routed to the FPGA according to the manner in which they are described in the Pins Reference for the XEM8320.

To the extent that I/O are configurable on the FPGA based on the bitfile you load, then yes, they are configurable. Please visit the Artix UltraScale+ I/O documentation for additional details.