Issues simulating VHDL project with ModelSim

Hello,

When I try to simulate in ModelSim my VHDL project that uses HostInterface functionality, I keep getting the following error message:

[INDENT][I]# vsim -L okFPsim -L unisim -t ps aes_TEST

Loading std.standard

Loading ieee.std_logic_1164(body)

Loading ieee.std_logic_arith(body)

Loading ieee.std_logic_unsigned(body)

Loading std.textio(body)

Loading ieee.std_logic_textio(body)

Loading ieee.numeric_std(body)

Loading ieee.math_real(body)

Loading work.aes_test(sim)

Loading lib_crypt.lib_crypt

Loading work.aes_crypto(behavioral)

Loading work.cfb(behavioral)

Loading work.aes(behavioral)

Loading work.control_aes(behavioral)

Loading work.key_expander(behavioral)

Loading work.s_box(behavioral)

Loading work.rcon(behavioral)

Loading work.encryption(behavioral)

Loading work.mux_2x1(behavioral)

Loading work.gen_s_box(behavioral)

Loading work.gen_mixcol(behavioral)

Loading work.mixcolumns(behavioral)

Loading work.x2_ffmul(behavioral)

Loading work.key_register(behavioral)

Loading work.vector_register(behavioral)

Loading work.sh_input(comport)

Loading work.ram_out(ram_out_a)

Loading xilinxcorelib.blk_mem_gen_v2_7(behavioral)

Loading xilinxcorelib.blk_mem_gen_v2_7_output_stage(behavioral)

** Error: (vsim-13) Recompile okfpsim.okhostinterface because ieee.std_logic_1164 has changed.

** Error: (vsim-13) Recompile okfpsim.okhostinterface(arch) because ieee.std_logic_1164 has changed.

Load interrupted

Error loading design[/I][/INDENT]

I went through all the steps described in the part 4 of the tutorial, and I can’t understand why this is happening. Any help would be greatly appreciated.

Regards,
Vitor

Which version of ModelSim and which version of the FrontPanel libs?

ModelSim version is XE III 6.3c
how do I check the FrontPanel lib version?

If you look in your install directory (c:\program files\opal kelly\frontpanel\simulation), you’ll find several versions of the libs.

When you configured ModelSim using the instructions in the FrontPanel User’s Manual, you would have referenced one of these directories.

this is the line i added to my modelsim.ini file:
okFPsim = C:/Program Files/Opal Kelly/FrontPanel/Simulation/ModelSimXE61e/okFPsim

so I assume the lib version is 61e ?

I was re-examining the project and maybe the reason behind this issue is related to the modifications I did in the okLibrary.vhd source code. I removed the BUFGDLL port and added two BUFG ports connected to a DCM that uses the usual ti_clk as it was before and a ti_clkx2. If you want, I can send you the modified source code for the okLibrary.vhd file and the DCM used so you could examine to see if it has any relation to the problem at hand.
Thanks,
Vitor

— Begin quote from vitorbal;2368

this is the line i added to my modelsim.ini file:
okFPsim = C:/Program Files/Opal Kelly/FrontPanel/Simulation/ModelSimXE61e/okFPsim

so I assume the lib version is 61e ?

— End quote

Yes, so if you have the latest FrontPanel installation, you just need to modify this to ModelSimXE63c.

Sorry for the late reply.
My FrontPanel only has up to ModelSimXE62g. Where can I get the latest version of FrontPanel ?

http://forums.opalkelly.com/showthread.php?t=649

You can also just get the modelsim libs here:

http://forums.opalkelly.com/showthread.php?t=597