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SZG-DUALSFP Sample(s)
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9
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853
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December 30, 2024
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Too many ddr3_cke pins in xem7360 xdc file?
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0
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25
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December 26, 2024
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Can I use sys_clk pin as ordinary IO?
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0
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48
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December 24, 2024
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XEM8350 Power/Current Delivery
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4
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93
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December 11, 2024
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Python wrapper (SWIG) to roll your own?
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1
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39
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December 4, 2024
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About Host simulation; reinvoke(relaunch) & Xilinx IP simulation
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0
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50
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November 27, 2024
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Operation of "IsTriggered" function in HDL simulations
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4
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79
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November 23, 2024
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Front Panel HDL synthesis on Windows 11 fails
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3
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137
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November 8, 2024
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Automating okFilePipe method (FPGA to PC)
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1
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55
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October 10, 2024
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XEM-7310 LVDS signal
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0
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43
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October 4, 2024
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XEM8320-AU25P Choosing Ethernet IP for onboard SFP cages
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0
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70
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August 19, 2024
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XEM7310 bank 35 voltage issue
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0
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45
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August 6, 2024
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XEM7010-A50 RAMTester Failing (Reading 0s)
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0
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47
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August 1, 2024
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Migrating from XEM6310 to XEM7310-A200
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0
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57
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July 25, 2024
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Vivado sim error, XEM7360 okCoreHarness : error generated
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2
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772
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July 23, 2024
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Failed to claim USB interface: Device or resource busy (error 16) under Ubuntu
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0
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181
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July 10, 2024
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Port width mismatch for port 'ep_datain' in okWireOut
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7
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179
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June 26, 2024
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Using ISE14.7 with an XEM7310-A200
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1
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95
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June 12, 2024
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Multiple XEM 7310 boards on Ubuntu 20 LTS
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0
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129
|
June 4, 2024
|
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[C++] Incorrect number of devices shown
|
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3
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1929
|
May 28, 2024
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Different okHost Ports for Simulation vs. Implementation XEM8350
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2
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682
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May 24, 2024
|
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okClk not toggling on xem7320
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0
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125
|
May 15, 2024
|
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Recommended method to Transfer data from PC to FPGA - USB3.0
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2
|
381
|
April 23, 2024
|
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XEM7310 RAMTester
|
|
16
|
3436
|
April 22, 2024
|
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Login Issues Fixed!
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0
|
142
|
April 17, 2024
|
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Need sample program for okFilePipe
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0
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228
|
January 30, 2024
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How to configure sma connection with fpga pins for reading external ttl pulses
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0
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234
|
January 19, 2024
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BRK8310 Breakout Board DMA transfer data integrity fails
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0
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230
|
January 17, 2024
|
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FrontPanel 5.3.0 and Fedora Linux
|
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3
|
315
|
December 24, 2023
|
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Limited datarate for high speed data from sensor
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0
|
224
|
December 19, 2023
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