Can clock capable IOs be used as regular IOs in XEM8310 board?

Xilinx FPGA
1

Hi,

I have this question/ confusion about clock capable IOs. Can I use them as general IO? I believe it can be but wanted to make sure before I see any fumes and spark.

For example: MC1: 27: AE20

IO Legend reads:

" Diff (-)

" Impedance Trace

Impedance controlled signal."

Differential signal -."

" Clock out

Device pin has clock network output support."

I would appreciate if someone could clear out this confusion for me.

Thanking you,
Nishant

2

Absolutely, you can use clock capable IOs as general IO. Being “clock capable” is merely a specific attribute assigned to the pin from AMD-Xilinx, indicating that the pin can efficiently handle clock signals, but it doesn’t restrict its use to only that function. These IOs can still be used for general digital input/output purposes.

You might find it useful to check out the UltraScale+ Device Packaging and Pinouts Product Specification User Guide (UG575). Specifically, the Pin Definitions section provides an in-depth understanding of this attribute (referred to as GC) and many others. Familiarize yourself with these attributes to prevent any potential issues during your implementation.

So go ahead, you shouldn’t see any fumes or sparks as long as you’re using the IOs within their specified electrical ratings.

1 Like
3

Thanks a lot, once again, Michael. :slight_smile:

I will go through the documents to educate myself. I appreciate your time.