Hello,
I was setting up the 7350-K160T board to output a divided clock signal to test whether an output port was working, and received the signal enclosed below, which had an incorrect frequency, no offset, and seemed to contain a large amount of noise.
We tried using a differential probe, then a DSO7054A Digital Storage Oscilloscope, with different termination resistances, and continued to see the same signal regardless. According to the ILA in vivado, the signal was being output correctly.
We believe that the board it was connected to broke the output ports, and are continuing to test, but does anyone know how we should be measuring LVDS25 signals? Or what may be causing a signal like this.
Expected a DC offset, 12.6MHz square wave measured using a differential oscilloscope.
Measured Using:
Tektronic MSO 72304DX with Differential probe: P7330 TekConnect differential probe
okClk is 100.8 MHz so output troubleshooting signal should be 12.6 MHz (0.09 microseconds per, 90 ns / div)
setting oscilloscope to 100ns/div