(This thread was originally created here)
Hi,
I’ve created a custom Syzygy pod for internal use with an Eclypse-Z7. It is based on the Syzygy PCB Templates project and has an Attiny44 on board. It does not use the VIO voltage rail but needs the FPGA to use 3.3 V logic levels to communicate.
I have cloned the Syzygy Tools project and created my own DNA definition, based on what I’ve seen in other definitions:
{
"max_5v_load": 200,
"max_3v3_load": 200,
"max_vio_load": 200,
"is_lvds": false,
"is_doublewide": false,
"is_txr4": false,
"vio": [
{ "min": 330, "max": 330 },
{ "min": 0, "max": 0 },
{ "min": 0, "max": 0 },
{ "min": 0, "max": 0 }
],
"manufacturer_name": "AWESOME INC.",
"product_name": "SZG-CHARLIE",
"product_model": "SZG-CHARLIE",
"product_version": ""
}
I then used the syzygy-tools.py script to create a .hex file from that definition and flashed this hex file to EEPROM, avr-dna-fw-main.hex to flash and set the fuses to the values found in the python script
Uefuse:w:0xFE:m -Uhfuse:w:0xDD:m -Ulfuse:w:0xE2:m
Flashing was successful, I can read out data via I2C, but the VIO voltage is not enabled - the LEDs indicating VIO enabled stay off. I tried to change the Vio min / max settings (all within the voltage range given on the Eclypse-Z7 reference page) but no change.
Pods that came with the Eclypse-Z7 board work correctly, so a hardware failure is unlikely.
Does anyone know what the error could be?