Opal Kelly Community

Topic	Replies	Views	Activity
I/O planning failed while interfacing PORT C or D of LTC226x with XEM8320 board XEM8320	9	425	August 8, 2023
Is it recommended to add ferrite bead on a custom board when supplying VCCO with external voltage source?	1	425	August 7, 2023
How to use internal 200MHZ clock pin on the opalkelly xem7360 FPGA board? Xilinx 7-Series	1	240	August 7, 2023
PORT-C in XEM8320 is not giving the same waveform as PORT-A and PORT-B XEM8320	1	333	August 4, 2023
FrontPanel Unsatisfied link error MacOS FrontPanel	1	358	August 3, 2023
Access via Docker FrontPanel	3	741	August 3, 2023
Is there a way to debug a project using Series-7 Opall Kelly? [DEBUG] Xilinx 7-Series	1	246	July 28, 2023
High speed IOs in XEM 7310 board? Xilinx 7-Series	5	285	July 25, 2023
Can clock capable IOs be used as regular IOs in XEM8310 board? Xilinx FPGA	2	252	July 20, 2023
1Ghz clock using XEM7001? Xilinx 7-Series	0	255	July 20, 2023
Could you post the complete XDC file that will work with the XEM8320 and Xilinx Vivado 2023.1 PCIe design setup as your walk through requires	0	246	July 6, 2023
Real time data transmission through PORT-A and PORT-B of XEM8320 board at a time XEM8320	1	240	July 5, 2023
Modifications needed in the program to collect data through PORT-A and PORT-B at a time of the board XEM8320	0	223	July 3, 2023
XEM7320 RAMTester	1	219	June 26, 2023
Using SZG-DAC-AD9116 FrontPanel	1	306	June 14, 2023
DES Example For LabVIEW FrontPanel	14	443	June 12, 2023
XEM7320 with SYZYGY ADC FrontPanel	1	308	June 9, 2023
FrontPanel IP "configuration flash" option - XEM8350 FrontPanel	2	261	June 2, 2023
Urgent Request for XEM6310-LX150 FPGA Board for Ongoing Project Xilinx FPGA	0	297	May 15, 2023
LabView FrontPanel DLL Import Contributions	12	5751	May 5, 2023
OpalKelly DES Test Vector Failing FrontPanel	1	269	May 5, 2023
Failed to register window class from okFrontPanelDevices_Construct FrontPanel	1	373	May 4, 2023
Why is timeout so bad, how to avoid it and how to recover from it? FrontPanel	4	342	April 14, 2023
Issue with reading bitstream files Xilinx FPGA	3	360	April 12, 2023
ECM1900 LED bitfile	0	272	April 12, 2023
Problem when printing out Python Code example in Programming Language Documentation Xilinx FPGA	4	380	April 7, 2023
ERROR: [Synth 8-5809] Synthesis Error with XEM7010 in Vivado	1	563	April 7, 2023
[DRC REQP-1578] Unsupported MMCME2_ADV VHDL / Verilog Discussion	2	458	April 4, 2023
Program on FIFO XEM8320	2	395	March 27, 2023
Source for used XEM6310-LX45 Suggestions	0	242	March 26, 2023