Opal Kelly Community

Topic	Replies	Views	Activity
ADS1675REF board support file request	1	637	December 24, 2020
Problem finding _ok module FrontPanel	0	1268	December 14, 2020
Dead Vadj rail on XEM7350 Xilinx FPGA	1	677	December 4, 2020
Initializing and Controlling the JP header pins with verilog [XEM7001/XEM7310] Xilinx 7-Series	0	787	December 4, 2020
Xem7310 Damage problem Xilinx FPGA	4	1173	December 3, 2020
XEM7310 I/Os pulled up during configuration, but shouldn't be	1	633	November 13, 2020
Initializing and Controlling the JP header pins with verilog [XEM7001] VHDL / Verilog Discussion	0	615	November 10, 2020
Wait for statement unsupported FrontPanel	3	1386	November 2, 2020
Cannot import ok Python library	2	2882	October 30, 2020
Connecting external Circuits to XEM7310MT FPGA Xilinx FPGA	0	769	October 18, 2020
MC1 and MC2 pin 1 location on XEM7310MT Xilinx 7-Series	3	760	October 18, 2020
WriteToBlockPipeIn unreliable FrontPanel	10	4323	October 14, 2020
GetDeviceCount() takes forever FrontPanel	4	749	September 26, 2020
How to use writetopipein() function with MATLAB API on XEM6310LX45? Spartan-6 USB 3.0 Modules	0	682	July 21, 2020
XEM7305 MIG core Xilinx 7-Series	2	932	July 18, 2020
Mutil-thread access to FrontPanel API FrontPanel	7	5053	July 11, 2020
Cant find a DLL entry point for the OKPanel function error FrontPanel	0	669	July 11, 2020
How to Disable USB? Xilinx FPGA	0	733	July 1, 2020
Suggestion to change okFilePipe documentation FrontPanel	1	736	June 17, 2020
Stream data from XEM7310	3	1155	April 30, 2020
Where is the documentation for the FrontPanel scripting?	10	2802	April 29, 2020
Examples on XEM6310 FrontPanel	3	1351	April 10, 2020
Matlab API discussion FrontPanel	11	10809	April 10, 2020
Sample Code on XEM6310 FrontPanel	0	663	April 6, 2020
Minimum BTPipeIn length	4	2514	March 30, 2020
XEM7310 clock tolerance	2	719	March 23, 2020
SYZYGY carrier/pod mounting hole specification SYZYGY	1	704	February 18, 2020
XEM7305 VCC_BATT pin Xilinx 7-Series	0	775	January 28, 2020
What is the meaning of package length and pcb length in pin reference of XEM7305? Xilinx FPGA	1	959	January 21, 2020
okHost differences in USB3 simulation libs FrontPanel	3	994	January 2, 2020