XEM7305 DDR3 MIG BA0 wrong pin?

Xilinx 7-Series
1

Hi,

Trying to implement the ramtester sample. When I tried to generate the memory core for the ddr3 uing MIG, I was not able to select the pin according to the table for BA0.
According to the table BA0 should be F6, but this pin is not among the ones in the drop-down list in MIG!
I use Vivado 2018.1 (and MIG for 7 series 4.1)

/Andreas

2

A silly mistake in a previous setting in the MIG made the problem. Works fine now!