Question about Ramtest verilog file

I have a question in ddr2_test.v file.

There is a line when you update the address to be written to the SDRAM, it says sth like (about line 140)

cmd_byte_address = cmd_byte_address + BURST_LEN*4

What I don’t understand is why is it 4 but not 2?

For example, if I set BURST_LEN = 2. Then that means each burst I will write 2 words of 32 bit = 64 bit in total. Since the RAM is 16 bit in word, I should advance address by 64/16 = 4 positions. BURST_LEN*4 will advance the address by 8 positions. So I think it should be

cmd_byte_address = cmd_byte_address + BURST_LEN*2.

Obviously this messed up the data written since I tried it already. I just don’t understand why it is not what I thought. Can someone tell me what I got wrong here?