PipeIn issues on 6010-150

Hello all,

I have to admit I’m quite stuck.

I’m trying to get a PipeIn into an XEM6010-150. In the course of troubleshooting I’ve shown a WireIn working, as well as my reset and clock. The PipeIn, however, is a different story.

I’m displaying the lowest 8 bits of the PipeIn on the LEDs for debug. The first time I write to the PipeIn I see the correct value, but the second time I write, it shows 0x0D and freezes (can’t get the LEDs to change with successive writes).

I have other code in the FPGA, but as far as the OpalKelly interface goes I only have an okHost and an okPipeIn:

okHI : okHost port map (
hi_in => hi_in,
hi_out => hi_out,
hi_inout => hi_inout,
hi_aa => hi_aa,
ti_clk => ti_clk,
ok1 => ok1,
ok2 => ok2);

pipein80_ReadAddr : okPipeIn port map (
ok1 => ok1,
– ok2 => ok2s( 117-1 downto 017 ),
ok2 => ok2,
ep_addr => x"80",
ep_dataout => pipein80_data,
ep_write => pipein80_valid);

I have a synchronous process to constantly sample the PipeIn dataout and assign it to the leds:

READ_ADDR_CAPTURE_PROC : process (clk, rst_n)
if rst_n = ‘0’ then
read_addr ‘0’);
elsif rising_edge(clk) then
– if (pipein80_valid = ‘1’) then
Write two bytes to Pipe 0x80

Any help would be appreciated. Anyone see anything wrong with the configuration/connection?