Microblaze for lx150 xem6010

I have been trying to build a microblaze project using the xem6010.
I am trying to use the ddr2 ram. As far as I can tell I have connected it according to the user guide but when I try to load code it says to check the memory.

I used the ucf provided by opal kelly.

Does anyone have a working hello world design that uses the ddr ram on the board.
Would be appreciated.

Any other suggestions would be good. Apart from that I would have to upload my entire project for anyone to see what I did or did wrong.

Curtis

Our RAMTester sample uses the DDR on-board. It’s not a microblaze project, but it can help you do a sanity check on the operation of the memory.

I tested the ramtester, it does work.

I also looked through all the settings for the project and the MIG. They seem to be the same as I am using.

Well I figured it out.

When I was converting the verilog to vhdl I misread the statement that set the chip select for the ram. I set it high instead of low.

Tested it after changing, now it works, the memory test application passed and i was able to run the hello world program on the ram.

If anyone needs a working example I could now provide one. Maybe Opal Kelly will host it on their download site.

This would make a great addition to our Contributions Forum.

Curtis,

A working copy of your code shared on the Opal Kelly Contributions Forum would be great!

Thanks,

It seems there is a limit of 1Mb on the contributions forum. I am unable to upload it. My Zip file of the project is 43Mb.

Why is it so big? Source files should be pretty compact. Perhaps you can go through and trim out the unnecessary files?

the ngm, ngc files are the bulk, but even the bit file is 4MB
there are also ncd, twx.

Not sure how much of it I can cut out before it doesnt work, any suggestions.

Those are all product files from the build (NGC, NCD, bitfiles, etc.). They won’t be necessary for a source-only distribution.

I was mistaken the folder containing the microblaze, contains a large number of large files, it is almost 100mb uncompressed. It has various files. I’m not sure what out of that to cut out and still keep platform gen happy.

Hi,

Do you still have the hello world example in EDK? I would very much like to take a look at it. I’m using a XEM6010 lx45 and I can’t seem to get the MIG axi ddr2 ram to work.
Your project would really help me. Thanks.

Adrian

I will send a PM with contact info

I cant seem to send to you, can you send a PM or email to me

[QUOTE=czaiss;3719]I will send a PM with contact info

I cant seem to send to you, can you send a PM or email to me[/QUOTE]

I can’t seem to PM you either. (I’m new :o) I created a new email address (don’t care about spam) that we can use to get in touch. Here it is: adrianl2006@yahoo.com

Thanks again!!!

Hello,
I’d also be interested in a hello world example.

Thanks in advance.

I got my particular app to work. I’ll try to contribute a working example in the coming days. Thanks again czaiss.

[QUOTE=czaiss;3466]Well I figured it out.

When I was converting the verilog to vhdl I misread the statement that set the chip select for the ram. I set it high instead of low.

Tested it after changing, now it works, the memory test application passed and i was able to run the hello world program on the ram.

If anyone needs a working example I could now provide one. Maybe Opal Kelly will host it on their download site.[/QUOTE]

Well I got microblaze to pass the memory test as well. It took me quite a while.

Here’s a quick run down of what I did.
I used BSB to build a microblaze core at 75mhz.
Peripherals are as follows:

  1. GPIO for leds
  2. GPIO for ddr2 cs# (MIG does NOT create this, took me a while to figure out)!
  3. ddr2 peripheral.

After that was done. I double clicked on the ddr2 guy to run the mig wizard. Selected ram, followed opal-kelly user manual for config options.
Next, GPIO for ddr2 was made into a 1 port GPIO, set to default output.
In the system.ucf I mapped the ddr2_gpio_pin to LOC=C3 (from ramtest example, this also took me a while to figure out) and added a pull down just in case.

So now we have our chip select pin (cs#) set to low on the proper pin, and we have a ddr2 peripheral.
One thing the auto tools will do is screw up the naming conventions.
Inside of edk you’ll see the external port names are something like MDDR2_dram_xxxx. However, the pin mapings made in MIG have names like mcbx_dram_xxx (go check the pins mappings, they are in /%projecet%/implementation/system_mcb_ddr2wrapper.ncf) (ncf is constraints file for memory, if you don’t see the file you’ll have to run generate net list first (even if net names are still screwed up)).

I’d recommend accepting the mig settings and updating the external port names inside edk (or the system.mhs file) to match.
If you don’t, when you go to synthesize, you’ll notice all your ram ports get trimmed.

So at this point you have pin net names mapped correctly to external ports (system.mhs matches ncf file), you have pull down on cs# line,now all you need is to fix the reference clock to match what you selected in BSB( i chose 200mhz). This is done via front panel.
Make your clock single ended in the system.ucf file and away you go.

Rambling.

— Begin quote from adrian;3725

I got my particular app to work. I’ll try to contribute a working example in the coming days. Thanks again czaiss.

— End quote

Hello adrian, I’m interested in your work, can you please share the project? I have the same 6010 board.

Thanks in advance,
Tarek

[QUOTE=tarekeldeeb;3826]Hello adrian, I’m interested in your work, can you please share the project? I have the same 6010 board.

Thanks in advance,
Tarek[/QUOTE]

Are you still in need of a 6010 sample project?
Which FPGA lx45 or lx150?
What version of ISE are you using? 13.4 or 14.1
What features do you need on the microblaze? peripherals, debuging (you need a JTAG)
single or dual core?
How much block ram do you need?
Do you need Perfomance or area?
Are you running code on the sdram or just using it to buffer data?

Answer these questions and I could help you to make a project, in doing so we can show eveyone else too.

I’ve done a number of different versions now. probably designed half dozen circuit boards to run these with ADCs from 1 SPS to 80MSPS speed, serial ports, an SD-Card interface with Fat file system.

[QUOTE=czaiss;3835]Are you still in need of a 6010 sample project?
Which FPGA lx45 or lx150?
What version of ISE are you using? 13.4 or 14.1
What features do you need on the microblaze? peripherals, debuging (you need a JTAG)
single or dual core?
How much block ram do you need?
Do you need Perfomance or area?
Are you running code on the sdram or just using it to buffer data?

Answer these questions and I could help you to make a project, in doing so we can show eveyone else too.

I’ve done a number of different versions now. probably designed half dozen circuit boards to run these with ADCs from 1 SPS to 80MSPS speed, serial ports, an SD-Card interface with Fat file system.[/QUOTE]

Thanks czaiss, I’ve managed to run microblaze on 6010 lx150.
I am stuck at debugging via jtag. I have the needed breakout board and Xilinx platform USB II JTAG cable.
I think MDM should be connected to the JTAG pins. Still did not figure it out.
How can I connect the debugger to the needed pins?

Thanks in advance,
Tarek