M25P32 flash interface

According to the UCF file, the flash pins are connected as follows:

flash_cs T5
flash_clk W12
flash_din AB15
flash_dout Y15

I am surprised to see flash_clk called out explicitly. I would expect it to be connected to CCLK. Are some of the flash signals connected to multiple FPGA pins so they can be used both for configuration and after configuration? I thought I would have to instantiate the STARTUP_SPARTAN6 module to provide access to CCLK (similar to XAPP1020), but I guess this would make it simpler.

But more importantly, I can’t find any documentation that specifies the direction of the flash_din and flash_dout signals. Are the din/dout directions from the perspective of the flash chip, or the FPGA?

Thanks for any info.

Yes, as you guessed the SPI pins are connected to multiple FPGA pins to make it’s use a little easier. din and dout are from the perspective of the FLASH. flash_dout is the ouput of the FLASH and an input to the FPGA.