Host interface doesn't work. Could it be broken somehow?

Xilinx 7-Series
1

Hello,
I’m currently working with XEM7010-200 to collect digital samples from ADC.
I am not sure what changed the device but suddenly the host interface does not work.
The configuration of FPGA using bit file and okCFrontPanel ConfigureFPGA() with python API works but the API cannot make a connection with the Host interface module.

When I check the FrontPanal host interface connection with ‘IsFrontPanelEnabled()’, it returns ‘false’. Since it doesn’t work, any commands such as ‘wire in’ , ‘pipe in’ don’t work returning error code ‘-15’.

I have another XEM7010-200, I loaded the exact same .bit file on it. In this case, the bit file worked and the host interface also worked. Would it mean that the host interface of the XEM7010-200 is permanently damaged? Is there anything that I can try to recover it?

  • I tried ResetFPGA… but it didn’t make any change.

Thank you!

2

Have you tried using the pre-built bitfiles we provide as a sanity check?

3

Thank you for your reply.

I am currently doing the sanity check with the pre-built bitfiles that okSupport recommended to me.

I will update it when I find any change related to the symptom.

Thank you!