XEM6310 DDR2 settings differ between example and documentation

In the xem6310 Usermanual the pins rzq and zio are specified as R7 and W4
Those cannot be choosen in the Xilinx MIG IP generator
In the xem6310.ucf these pins are specified as K7 and Y2
Is the documentation in error ?

Can you please confirm where you got this information? Are you maybe looking at the XEM6310MT user’s manual? Note that the XEM6310MT and XEM6310 are different devices.

please see also mail with this quote and pictures

I think I still must be missing something. The image you submitted to our tech support was from page 12 of the XEM6310 User’s Manual and doesn’t have any mention of RZQ or ZIO that I can see. It also doesn’t mention pins K7, Y2, or R7, W4 for that matter.

I just looked at our documentation online and did not find any references to pins R7 or W4. R7 is referenced, but only as a reference designator for setting up the Vbatt.

Sorry you are right my mistake, somehow I got the two usermanuals the 6310 and the 6310MT
open in the same browser and I assumed I was looking at the 6310, but instead I shoudl have seen that my browser displayed the 6310MT