XEM-3010-1500, i2c pins on FPGA

Can someone clarify why the FPGA on the XEM-3010-1500 has I2C sda and scl output pins if they are always set to 1’bz?

Yes. Per the XEM3010 User’s Manual:

— Begin quote from ____

[FONT=sans-serif]The FPGA on the XEM3010 is attached to the I2[/FONT][FONT=sans-serif]C lines from the USB microcontroller. In order [/FONT][FONT=sans-serif]to avoid contention with the I[/FONT][FONT=sans-serif]2[/FONT][FONT=sans-serif]C bus, these lines should be set to high-impedance within your [/FONT][FONT=sans-serif]design. If this is not done, FrontPanel may timeout or hang when trying to communicate with the [/FONT]XEM3010, particularly when programming the on-board PLL

— End quote

Yes. But I’m asking what is the purpose of having sda and scl output pins on the FPGA if they are just going to be set to 1’bz?