Is there a VHDL memory controller available for the XEM3010-1500? There is a verilog version in the RAM tester project, but there is not a VHDL one.
Sorry, no. Just the Verilog version.
However, it should be noted that Xilinx ISE allows Verilog/VHDL sources to be synthesized into the same project.
I did a direct port of the entire RAMTester project form verilog to VHDL and I would like to make it avalible to the community, however I don’t want to get in trouble with the administrators, so would some one let me know how I should go about it.
There’s no getting in trouble here!
If you’d like, I can post it on our Support page as a 3rd-party contribution. Please just zip it up and send it to email@example.com. Include any information inside the zip that you like. The zip wil be posted verbatim.
Please also give me specific information that you want included as a credit on the support page. For example: Credit to: “J. Smith” if that’s what you want. Or Credit to: “John Smith (firstname.lastname@example.org)” if you want your email to be there, too.
Thanks Mike – This has been posted!
I tried to download this VHDL port of the RAM controller but it looks like
there is a problem with the link.
Fixed. I would have sworn I tested that link!