Use of SDRAM on XEM3005E

FrontPanel
1

Hello everybody
I am trying to use the ramtest example SDRAM to and from XEM3005E board
In this example verilog source code I can’t find anything about the module:
“okWireOR # (.N(2)) wireOR (ok2, ok2x);” and i get the obviouse synthesis error:
“ERROR:HDLCompilers:87 - “ramtest.v” line 319 Could not find module/primitive ‘okWireOR’”
I am using FrontPanel/Firmware Version 3.1.5
Can anybody help me with this?
Thanks a lot
Ehud

2

okWireOR is defined in okLibrary.v

3

Hello again
I am having trouble generating a working configuration bit file from the readRam example
I am using windows 7 32b and Xilinx ISE13.4
I am able to configure the XEM3005E board using the original ramtest.bit file from the example but I get the following error when I try to regenerate the same bit file using the same HDL code

// Check for FrontPanel support in the FPGA configuration.
if (false == dev->IsFrontPanelEnabled()) {
printf(“FrontPanel support is not enabled.\n”);
delete dev;
return(NULL);
}
See also the attached ise project.
Any help is really appreciated
Ehud

XEM3005.zip (419.0 KB)