Check out our documentation on Block-Throttled Pipe Outs here: USB 3.0 HDL - Opal Kelly Documentation Portal. Of course, if you are using a USB 2.0 device, please navigate to the USB 2.0 HDL section instead. This documentation page explains EP_READY and potential use cases as well. Feel free to reach out if you have any more questions!
Thank you for the reply. I’ve already seen this documentation.
But I cannot find detail description about what I need.
When EP_READY is asserted, does it deassert automatically after reading the whole block?
I need some information about how to control EP_READY to deassert.
What I want to do is reading the block repeatly, but if I EP_READY signal has to be controlled the same data might be read because EP_READY signal will be still high. So I need to deassert it after reading it once. If it is not automatically deasserted, I think I have to make another signal for handover.
EP_READY is an input to the okBTPipeIn and okBTPipeOut. This means that your logic must generate this signal and assert / deassert it. There’s no such thing as a “deassert automatically” signal.
From the documentation:
When EP_READY is asserted, the host is free to read a full block of data.
This means that your logic should assert EP_READY when there is a full block available to the host.
When EP_READY is deasserted, the host will not read from the module.
This means that your logic should deassert EP_READY when there is not a full block available to the host.
It’s not exactly clear what you mean by “reading the block repeatedly” but if you mean to say that you have a single memory buffer that you want to read out, refill with new data, read out, refill with new data, and so on… Then yes, you’ll need to find a way to sequence the new data into this. You can used the EP_BLOCKSTROBE to know when the host has initiated a block read-out as indicated in the timing diagram in the documentation.
There is additional guidance in the “System Design” page: