Most host interfaces to DSP chips are relatively simple – typically involving a data bus and some asynchronous lines to control read/writes to particular registers that are on the HI – but I’m not familiar with that exact device.
FPGA work would involve converting the signals provided by our modules to pins on the HI. Assuming the device is asynchronous, you could probably get away with a bit-bang sort of method where you use the WireOut and WireIn devices (we provide) to control the DSP lines directly. This is slow, though.
To do things better (and much faster), you would need to implement a state machine or two to interface between our modules and the DSP HI. Still not all the much work, but it really depends on what you want to get in to.
To put it in perspective, someone with good HDL experience could probably write the HDL in a few hours. A few hours more and a fully working interface would be ready.