I’m trying to work through the tutorials on your website (I haven’t programmed in an HDL for many years now and am currently brining myself back up to speed). Tutorial 1 was a breeze, however I’ve come unstuck with tutorial 2,
[QUOTE]Now, we need to add the files necessary to implement FrontPanel capability in the FPGA design. These include a Verilog or VHDL file (okLibrary.v) and several pre-synthesized modules (*.ngc). The HDL file needs to be added to the project. The pre-synthesized modules can simply be placed in the project directory; the Xilinx tools will find and use them during the appropriate steps during build.
There is no okHostInterfaceCore.ngc on my computer, the other ones are there but this one isn’t. I have Front panel 3.1.0 installed, Xilinx ISE 12.1 on windows 7. I’m guessing this is to do with version changes to the front panel software, but it has stumped me. I have read both these
but they do not explicitly help me. Can anyone shed some light on either what is wrong with my installation, or how to proceed with the tutorials without the required files.