I am trying to simulate the verilog testbench example in the USB3 folder using Modelsim PE 2020.3. The problem seems to be in calling the okhostcalls.v file. First, the only copy of this file I can find is in RamTester/XE5010. The board I am targeting is the 7310 but I don’t think this is the problem.
The first errors I get when I try to compile are that the signals hi_in, hi_out and hi_inout are undeclared. I can add those in easy enough but then when I do I get “global declarations are illegal in verilog 2001 syntax”.
The only thing I can find on that error is that it can happen when a parameter is declared outside of a module. However the file that calls okhostcalls is sim_tf.v and uses the include statement within the module/endmodule pair so I don’t see why this is getting flagged.
Any ideas on what might be happening?