Problems with synthesis of "First" module

Hello,

I am trying to synthesis the “First” module in the Samples directory provided when you download Front Panel.
I am getting the following errors

“C:/xem/First/First.vhd” line 85: In entity
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
ERROR:Xst:2585 - Port of instance does not exist in definition .
–>

I am getting the same errors when i try to synthesize the Counter module in examples. I have inluded the First.vhd, okLibrary.vhd and all the *.ngc files. I see ? marks next to some of the names under the source file.
I have observed that only few ports are described in the okLibrary.vhd file. The rest lie in the presynthesized file okHostInterface.ngc. I am not sure the synthesis tool understands that the ports reside in both these files.

Your suggestions would be appreciated

Thanks,
AJT

I am using Xilinx ISE 9.1. I am getting similar errors when i try to synthesize the design by using First.v, okLibrary.v and xem3001v2.ucf. In case of Verilog, i get 30 errors compared to 9 in VHDL. Errors for the Verilog module are as follows

ERROR:HDLCompilers:91 - “Counters.v” line 137 Module ‘okHostInterface’ does not have a port named ‘hi_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 138 Module ‘okHostInterface’ does not have a port named ‘hi_rdwr’
ERROR:HDLCompilers:91 - “Counters.v” line 139 Module ‘okHostInterface’ does not have a port named ‘hi_cs’
ERROR:HDLCompilers:91 - “Counters.v” line 140 Module ‘okHostInterface’ does not have a port named ‘hi_irq’
ERROR:HDLCompilers:91 - “Counters.v” line 141 Module ‘okHostInterface’ does not have a port named ‘hi_busy’
ERROR:HDLCompilers:91 - “Counters.v” line 142 Module ‘okHostInterface’ does not have a port named ‘hi_addr’
ERROR:HDLCompilers:91 - “Counters.v” line 143 Module ‘okHostInterface’ does not have a port named ‘hi_data’
ERROR:HDLCompilers:91 - “Counters.v” line 145 Module ‘okHostInterface’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 146 Module ‘okHostInterface’ does not have a port named ‘ti_data’
ERROR:HDLCompilers:91 - “Counters.v” line 149 Module ‘okWireIn’ does not have a port named ‘ti_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 149 Module ‘okWireIn’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 149 Module ‘okWireIn’ does not have a port named ‘ti_data’
ERROR:HDLCompilers:91 - “Counters.v” line 153 Module ‘okWireOut’ does not have a port named ‘ti_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 153 Module ‘okWireOut’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 153 Module ‘okWireOut’ does not have a port named ‘ti_data’
ERROR:HDLCompilers:91 - “Counters.v” line 156 Module ‘okWireOut’ does not have a port named ‘ti_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 156 Module ‘okWireOut’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 156 Module ‘okWireOut’ does not have a port named ‘ti_data’
ERROR:HDLCompilers:91 - “Counters.v” line 159 Module ‘okWireOut’ does not have a port named ‘ti_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 159 Module ‘okWireOut’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 159 Module ‘okWireOut’ does not have a port named ‘ti_data’
ERROR:HDLCompilers:91 - “Counters.v” line 163 Module ‘okTriggerIn’ does not have a port named ‘ti_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 163 Module ‘okTriggerIn’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 163 Module ‘okTriggerIn’ does not have a port named ‘ti_data’
ERROR:HDLCompilers:91 - “Counters.v” line 167 Module ‘okTriggerOut’ does not have a port named ‘ti_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 167 Module ‘okTriggerOut’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 167 Module ‘okTriggerOut’ does not have a port named ‘ti_data’
ERROR:HDLCompilers:91 - “Counters.v” line 170 Module ‘okTriggerOut’ does not have a port named ‘ti_clk’
ERROR:HDLCompilers:91 - “Counters.v” line 170 Module ‘okTriggerOut’ does not have a port named ‘ti_control’
ERROR:HDLCompilers:91 - “Counters.v” line 170 Module ‘okTriggerOut’ does not have a port named ‘ti_data’
–>