Problems with BTPipeIn with Labview

Hello everyone,

I’m having problems with using PipeIns from Labview 2010 with a XEM6010-LX45 board.

Basically, I’m having Labview send a burst of data to the FPGA whenever the user presses a button.
Currently, to simplify things, my VHDL just instantiates one pipe, the host interface, and sends the pipe data to leds.

Problem is, everything works for the first few transfers, then it stops working and the BTPipeIn endpoint keeps outputting 0xF00D (I think) as data, regardless of what I’m sending from the PC.
This happens after a variable number of transfers.
With my current VHDL I can’t check, but with my previous code I was able to see that I received from the endpoint the correct number of words - but the actual data received is always 0xF00D.

So far, I’ve tried a few things:
Once the pipe stops working correctly, using Reset FPGA does not resume correct behavior.
Using Destruct, then calling Construct and Open By Serial does not resume correct behavior.
I tried changing to PipeIn, with no difference in behavior.

Once the pipe locks up, seems that the only way to get the FPGA to behave correctly again is to reload the bitfile.

I tried running the PipeTest example, it works and doesn’t report any transmission errors.

ISE bitfile generation gives no errors, and says that all timing constraints are met. I’m using the xem6010.ucf file from the “First” example.

I’m using both Labview and the PipeTest example from a virtualized Windows XP running on a Mac host machine; but I think the drivers are not the problem, as PipeTest works and WireIns work too.
I also tried running Labview from a native Windows7 machine, with no difference in behavior.

Can anyone help me find out what I’m doing wrong?


  • Dave

In your HDL implementation, please confirm that you’ve attached okAA as we have done so in the samples. Please also confirm that your UCF file has the correct mapping for okAA as we have in our sample UCF files.

Looking at my VHDL, I can say I had missed the hi_aa signal when instantiating the host interface (somehow, the user manual VHDL code does not connect hi_aa, while the code examples do).

I’ve corrected my VHDL adding the hi_aa connection. When I get back to university lab I’ll try it out on the XEM.

Thanks for helping!

  • Dave