I am trying to use a block throttled pipe to control when data is ready.
Basically, the code is really simple: ep_ready signal is set/reset
every 256 cycles, and a counter supplies the data.
Block size is set to 128.
Unfortunately, no data is read by USB.
For some reason, USB fails to assert the ep_read signal (pipe_read).
I am attaching a picture of output of logic analyzer.
The logic analyzer is set to trigger on ep-read going high,
but it never goes high.
If I simply tie the ep_ready signal to ‘1’, there is no problem.
I can read all my data.
Can anyone help me with what the problem might be?