Post-Translate simulation problems

FrontPanel
1

I’m using ISE 8.2, Modelsim SE 6.1e, and Front panel 3.0.1.

My test fixture does the following:

[QUOTE]initial begin
// Delay 1 us to get past GSR
#1000;
FrontPanelReset;

        // Set up values for DDS phase increment to yield 1,000,366 Hz.
SetWireInValue(8'h00, 16'h0667, 16'hffff);
UpdateWireIns;

// Load up the DDS by toggling WE
ActivateTriggerIn(8'h40, 1);[/QUOTE]

Behavorial simulation works fine however post translate simulation does not. The wire and trigger are never updated. The correct address and values do show up on hi_dataout. Anybody have a problem like this before?