PLL not generated


#1

Hi,

I had a question regarding the PLL. I am a newbie but I believe I have everything that I need to generate a PLL. I am trying to run a counter based on the PLL. The counter data is put onto a bus that transmits the values to a computer via a double buffer. The values are recorded using a C++ application. The PLL will be controlled by the C++ algorithm. I know my algorithm runs because if I use the system clock, I can view my counter values. However, when I use my PLL as the counters clock, the counter refuses to count up. Also, I am tying the system clock to the PLL but the code seems to ignore this. It just uses the system clock anyways.


#2

Are you using one of our FPGA boards? Which device? How do you mean that the PLL is being controlled by the C++ algorithm? Can you post any code snippets?