have just received the board, and am trying out the samples first, but have a problem where the sample application “PipeTest” fails when the ‘test pipe in / out’ buttons are pressed.
Also in the Fifo controls section, the Write to Fifo-in seems to generate some data, but the read FIFO-in always returns FFFF
here is the output from the Pipetest.exe.
FrontPanel DLL built: Jan 23 2007 20:33:37
FPGA configuration complete.
Bytes written: 0.
Write: 21078 milliseconds (0.049747 MB/sec) (0.397979 Mb/sec)
Read: 10031 milliseconds (0.104534 MB/sec) (0.836268 Mb/sec)
BPI Write: 2329 84BE 6CE1 AED6 9052
BPI Read: 0xFFFF (status: 0xFFFF)
BPO Write: 0x1649
BPO Read: 0xFFFF 0xFFFF
Any help gratefully received.