Hello,
I have a simple task - I need the fpga to use 32 bits on the YBUS to display a 32 bit HEX number (in negative TTL). My code is below. Roughly speaking, I use the wire-in method in LabView to insert the number, display part of it on the LED’s (for debugging) and assign the wire to the YBUS. I then assign the YBUS to another wire, which I can use read-out on (to check).
My problem is that this works only with the 16 least significant bits. I think the labview works (I pass in 32 bit unsigned ints), but am at a loss otherwise. The code below is based on the “first” example from the Opal Kelly CD.
Thanks
default_nettype nonetimescale 1ns / 1ps
module First(
input wire [7:0] hi_in,
output wire [1:0] hi_out,
inout wire [15:0] hi_inout,
output wire [7:0] led,
output wire [31:0] ybus
// input wire [3:0] button
);
// Opal Kelly Module Interface Connections
wire ti_clk;
wire [30:0] ok1;
wire [16:0] ok2;
// Endpoint connections:
wire [31:0] ep00wire;
wire [31:0] ep20wire;
//32BIT format
assign led = ~ep00wire[19:12];
assign ybus = ~ep00wire[31:0];
assign ep20wire = ~ybus;
// Instantiate the okHost and connect endpoints.
wire [17*2-1:0] ok2x;
okHost okHI(
.hi_in(hi_in), .hi_out(hi_out), .hi_inout(hi_inout), .ti_clk(ti_clk),
.ok1(ok1), .ok2(ok2));
okWireOR # (.N(2)) wireOR (.ok2(ok2), .ok2s(ok2x));
okWireIn ep00 (.ok1(ok1), .ep_addr(8’h00), .ep_dataout(ep00wire));
okWireOut ep20 (.ok1(ok1), .ok2(ok2x 0*17 +: 17 ]), .ep_addr(8’h20), .ep_datain(ep20wire));
endmodule