I am using a Bram in an FPGA Design. The port A of the Bram is connected to an DSOCM controller, the other port B it says is not connected. I am making the ports in PORTB of Bram external and through a VHDL testbench i am loading he Ram with data to a specific address. The think is that this is not loading the data because port B seems inactive.
do you know what i have to do in order to use (activate) the PortB of the Bram attached to an OCM bus?