Ok, so there’s no longer an ep_addr input to the PIPE modules for the XEM-6110. What happened? Are we no allowed only one of each? That will be a pretty radical mindset change for those of us that have been used to thinking about PIPEs as unique channels with their own FIFO, behavior, and logical address.
I scoured the documentation but I didn’t see any mention of this shift. What’s the technical reason behind it?
At the moment, the PCIe pipes only support a single source and single destination. Obviously, the addition of a mux and FIFO can easily extend this ad nauseum.
“Native” support for multiple pipe endpoints is planned for the next release of the PCIe stuff. We have a number of additional features that just didn’t make it into our initial release, unfortunately.
mahengjie-- The XEM6110 is very much ready and operational. It works great and provides a fantastic performance boost to applications that require more throughput than the USB 2.0 connection allows.
I thought about the new 6110 module, and am still not convinced it is a logic upgrade path for the 3010 as described. The increased speed of PCIe of 6110 does not make up the loss of convenience of USB 3010. A update of 3010 should be a 3010 fitted with a Spartan 6 (with a 45T part), and still maintain the price at 3010 level.
— Begin quote from Opal Kelly Support;3043
mahengjie-- The XEM6110 is very much ready and operational. It works great and provides a fantastic performance boost to applications that require more throughput than the USB 2.0 connection allows.