Modelsim XE 6.3c problem

Hi,
I previously used XE 6.3c (the free starter version) with the O-K supplied libraries for simulations (on both the examples and my own applications), and it worked great. I had been doing that until a few months ago. Now I need to use that process again, but found the batch processing scripts quit working. The Modelsim keeps complaining
?** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.
It does that even on the simplest first.do of the example First. Can anyone tell me what is going on here ? Is it my computer or the software ? Thanks.

-mahengjie

Here is the error message from XE

do first.do

** Warning: (vlib-34) Library already exists at “work”.

Model Technology ModelSim XE III vlog 6.3c Compiler 2007.09 Sep 12 2007

– Compiling module FIRST_TEST

Top level modules:

FIRST_TEST

Model Technology ModelSim XE III vlog 6.3c Compiler 2007.09 Sep 12 2007

– Compiling module First

Top level modules:

First

vsim -L okFPsim_ver -L unisims_ver -t ps FIRST_TEST

Loading work.FIRST_TEST

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

Loading work.First

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

** Error: (vsim-3033) …/First.v(53): Instantiation of ‘okHostInterface’ failed. The design unit was not found.

Region: /FIRST_TEST/dut

Searched libraries:

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

C:\Modeltech_xe_starter\xilinx\verilog\unisims_ver

C:\OK_tutorial\Samples\First\XEM3010-Verilog\Simulation\work

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

** Error: (vsim-3033) …/First.v(55): Instantiation of ‘okWireIn’ failed. The design unit was not found.

Region: /FIRST_TEST/dut

Searched libraries:

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

C:\Modeltech_xe_starter\xilinx\verilog\unisims_ver

C:\OK_tutorial\Samples\First\XEM3010-Verilog\Simulation\work

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

** Error: (vsim-3033) …/First.v(56): Instantiation of ‘okWireIn’ failed. The design unit was not found.

Region: /FIRST_TEST/dut

Searched libraries:

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

C:\Modeltech_xe_starter\xilinx\verilog\unisims_ver

C:\OK_tutorial\Samples\First\XEM3010-Verilog\Simulation\work

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

** Error: (vsim-3033) …/First.v(57): Instantiation of ‘okWireIn’ failed. The design unit was not found.

Region: /FIRST_TEST/dut

Searched libraries:

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

C:\Modeltech_xe_starter\xilinx\verilog\unisims_ver

C:\OK_tutorial\Samples\First\XEM3010-Verilog\Simulation\work

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

** Error: (vsim-3033) …/First.v(59): Instantiation of ‘okWireOut’ failed. The design unit was not found.

Region: /FIRST_TEST/dut

Searched libraries:

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

C:\Modeltech_xe_starter\xilinx\verilog\unisims_ver

C:\OK_tutorial\Samples\First\XEM3010-Verilog\Simulation\work

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

** Error: (vsim-3033) …/First.v(60): Instantiation of ‘okWireOut’ failed. The design unit was not found.

Region: /FIRST_TEST/dut

Searched libraries:

** Error: (vsim-23) Unable to change to directory path “okFPsim_ver”.

No such file or directory. (errno = ENOENT)

C:\Modeltech_xe_starter\xilinx\verilog\unisims_ver

C:\OK_tutorial\Samples\First\XEM3010-Verilog\Simulation\work

Error loading design

Error: Error loading design

Pausing macro execution

MACRO ./first.do PAUSED at line 12

@mahengjie-- Did you follow the procedure in the FrontPanel User’s Manual for configuring ModelSim?

I forgot to add the OK strings to the ini file of ModelSim when I updated the version to 6.3c. It has been a while since I used OK/Modelsim simulation last time, and I totally forgot about these details.

Thanks.