Migrating from XEM6010 and XEM6310

I am trying to modify a system that currently uses XEM6010-LX45. To migrate to XEM6010-LX150, it seems to me I just have to compile the same Verilog with Xilinx ISE Logic Edition software, is this correct?

I have another system that uses XEM6310-LX45. To migrate to XEM6310-LX150, is it also just a matter of compiling Verilog differently?


To migrate from the XEM6010-LX45 to the XEM6010-LX150, you just need to target the different device in ISE. Depending on your design, you may have to re-do some timing closure, but this is generally straightforward for most designs.

The same is true of the XEM6310-LX45 to the XEM6310-LX150. However, note that there is a slight change to the okLibrary.v between these two devices. This is due to the greater demands of the USB 3.0 host interface and so a timing adjustment is required for proper timing closure.

Ok, for the latter, even though there is a change in okLibary.v between the two devices, using the API shouldn’t be any different right?

On another note, if I have a bit file compiled for XEM6310-LX45, I should be able to upload it onto the XEM6310-LX150 (firmware 1.20) through FrontPanel right? I have yet to setup the Xilinx ISE Logic edition, but when I did this, I’m receiving the “FPGA Configuration failed: Done did not go high” error. Is this expected from the difference in compile target?

The API communication will be identical from one USB 2.0 device to another USB 2.0 device.

The bitfiles for different densities are not compatible. All of the internal hardware needs to be configured and two densities have different internal hardware.