Check for an LVDS based solutions.
If you are using two FPGAs for reasons such as not having enough gates on one or not having enough throughput from one (and breaking the task into two, eg image processing). The LVDS linking between th two would provide you with a high speed solution. Plus one FPGA to another can be linked without any external level shifting/circuitry if the two are relatively close and on the same PCB/PWB.
Xilinx’s new tools provide build in LVDS coregens or you can create your own depending on the application at hand.