Implementation using XFLOW, ISE 8.1i


#1

For the benefit of others who are not using the GUI, but rather the much simpler to use (and often overlooked) command-line tool provided with ISE: XFLOW. I couldn’t find a solution for the following issue in the forums yet and the Xilinx answer-base is light on info.

You’ll get an error that looks something like the following:

[FONT=“Courier New”]ERROR:Xst:2402 - Several potential top modules (, , , , , , ) are conflicting. You must specify one using -top switch.[/FONT]

This means that you’ll need to specify a top-level module for XST as it seems as though it has many to choose from (in the GUI it is obvious). You do this by adding:

[FONT=“Courier New”]"-top ";[/FONT]

to your -synth .opt (xst_verilog.opt, most likely) file right after the “run” command.

Hope this helped anyone.


#2

This is a good point. In fact, since Xilinx started bloating their *.ise files with ISE 7.1, we will be distributing only XFLOW scripts for building our samples.

The XFLOW is how we build everything in-house (along with Ruby scripts) and it makes things much easier, cleaner, faster, and maintainable.