I am thinking about attaching photodiodes to the FPGA’s I/O pins, and I was just wondering what is the threshold for logical 0s and 1s for the FPGA. For example, if FPGA reads 2.5V at its I/O pin as input, is that going to be interpreted as a ‘1’ or ‘0’? My assumption is the 70/30 rule, where if the VDD is 3.3V, then 3.30.7=2.31V and above are logical ‘1s’ and 3.30.3=0.99V and below are logical ‘0s’ and the things in between are U - Undefined.
Can you please let me know if this is right? If not, what is the correct scheme?
Also, can any1 validate my assumption that when FPGA writes a logical ‘1’ at it’s I/O pin as output, it writes 3.3V and when it writes a logical ‘0’ it does 0V or GND.