I/O defaults


#1

I want to use the board to snoop (monitor) a system bus. However, on power up the I/O pins default to output high. Needless to say, this will cause problem if I try to attach it to the bus I want to monitor.

Once I download my bit file everything is OK (the pins are configured for input).

Question: How can I force the board to power up with the I/O pins tristated or configured for input?


#2

Hello-

On the Spartan-3/E FPGAs, the HSWAP pin controls the power-up behavior of the I/Os. On the XEM3010, we have the default to a pull-up resistor. The Spartan-3s, unfortunately, have a relatively powerful pull-up (see the S3 datasheet for details).

Our XEM3005 (due out later this year) has this pin configured to power up the I/Os in tristate with an optional resistor pad available for the pull-up configuration.


#3

According to the S3 spec, HSWAP_EN (E6) has an internal pullup and can be left floating. Is there a resistor on the board that I can remove to let HSWAP_EN float?

“A Low level applied to the HSWAP_EN input enables
pull-up resistors on User I/Os from power-on throughout
configuration. A High level on HSWAP_EN disables the
pull-up resistors, allowing the I/Os to float. If the
HSWAP_EN pin is floating, then an internal pull-up resistor
pulls HSWAP_EN High
. As soon as power is applied, the FPGA begins initializing its configuration memory. At the same time, the FPGA internally asserts the Global
Set-Reset (GSR), which asynchronously resets all IOB storage elements to a Low state.”


#4

No. Unfortunately, the current XEM3010 hardware has this pin hard-wired to DGND.


#5

Well then, we’d like to drill this pin out. Can you look at the PCB layout and tell us if it is safe to drill through the PCB to pin E6 without striking any other traces?


#6

It is not safe to drill directly to E6. Please email support@opalkelly.com and we can discuss alternatives.