I’m just starting out with OK boards, did a demo project where I control some LEDs using Python code via WireIn. I would like to be able to send larger amounts of data to the FPGA, possibly using PipeIn and have that data be accessible from the MB MCU for manipulation. I could not find any examples that show a block diagram for Vivado with a possible implementation. Please share if you have anything like that. Thanks!
Please check out this How-To Guide:
The DESTester example also provides some guidance:
Thanks for the reply, however this is not exactly what I need.
I need a way to move the data from Pipein to some buffer and to the MB. This can be done using the AXI4 Stream Buffer block in Vivado perhaps? tkeep and tlast would need external driving, but otherwise could this work? Another option could be writing direct to BRAM to some address and later read by MB. This is a more custom solution.
For a more in-depth project with DRAM buffering on the FPGA module, have you checked out the camera reference design?