Perhaps it’s just due to a ground loop between power supply and XEM, but I’m having trouble externally powering the FPGA. I want to apply 3.3V from a truly ground referenced bench supply, since I’m getting huge amounts of noise on the scope and logic analyzer when I take power off USB. Following the directions in the user’s manual, however, of applying the relevant voltage to one of the pins closed by JP1 does not seem to work, what would the negative terminal of the bench supply be tied to? The ground plane of the XEM? (tried that and it seems to short the supply) I definitely do not want to kill the FPGA, so if you have any pointers, I’d appreciate any insight.
JP1, JP2, and JP3 each have 3.3v connections and GND connections. It should be noted that they are connected to the USB ground which is then connected to your PC. You should test the potential between the XEM ground and the bench ground before doing anything.
We have successfully powered the XEM from bench supplies (and small wall supplies) many times, so it is at least a tested configuration.