How does the "rowaddr" work in sample "RAMTest"?

In “ramtest.v”, there is a reg with the name “rowaddr” corresponding to the port “rowaddr_in” in the “sdramctrl” module.

I tried to write in the first 0~8M of the SDRAM since I have to set aside 24M space for my own chip writing data into SDRAM.

So I replace the sentence in the state of “n_wackwait” :
rowaddr s all. Thank you!