I’m using the opal kelly to configure my circuits. After I finish configuring the circuits, I just need several opal kelly output pins to be at constant voltage (vdd or gnd), so I want to turn off PLL and any clock on the opal kelly board.
Is this possible? Can the voltages still hold after the clocks are off? Thanks.
I’m not exactly sure what you’re after, but you can refer to the Cypress CY22393 to see if this is possible. When you un-check “enable” through the FrontPanel Application, the corresponding output is disabled.
Thanks for the answer, do you know how to disable the PLL with C++ API? I’m not controlling with FrontPanel.
The reason I want to turn off the PLL is that right now the opal kelly board is injecting some noise to my circuit through the shared gnd. Therefore I want to turn off everything after I’m done configuring my circuit with OK borad.
Thanks again!
See the API documentation:
http://www.opalkelly.com/library/FrontPanel4API/index.html
The PLL settings are available through the PLL classes (okCPLL22393 in this case).
Thanks, I just tried to get PLL info, but I couldn’t get the code working, can you help me?
//after xem=initXEM()
okCPLL22393 *pll = new okCPLL22393;
xem->GetPLL22393Configuration(*pll);
The program will return with exception at the function GetPLL22393Configuration;
with error code 0x10001a00, and the pll is void (0x0000). What should I do differently? Thanks.