Has anyone else had this warning before?

I am getting this warning when synthesizing:
WARNING:Xst:2183 - Unit okHI/hicore: the following tristate(s) are NOT replaced by logic (Please refer to Answer Record 20048 for more information): ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data, ti_data.

It seems to be not using the ti_data lines. Has anyone else had this problem, and if so, what did you do to fix it?

That is a “safe” warning to ignore. It means that the tristate signals described are not setup as tristates in the FPGA fabric (because Xilinx doesn’t support them). Instead, they will be converted to a MUX.