Hey everyone,
I recently started on a project that is in its second generation, and I am very rusty at FPGA coding/design. The first generation design is quite complex, and the engineer who made it no longer works for the company.
I’m going through all of the design files, and there are very many of them. I’m just slightly confused about the directory structure of a OpalKelly project, as well as the method to determine which of these files were created by the previous engineer and which are found online and downloaded. So my real questions are:
Is there a pre-defined organization of directories in an opalkelly project?
Is there a method to determine which are user-created and which are downloaded or automatically made by the SDK?
For instance, there are two directories in the .srcs folder named:
fifo_w32_1024_r256_128
and
fifo_w256_128_r32_1024
Looking these up online comes up with no results, but the files inside look like they were not written by the previous engineer. How do I figure out where to go from here?
Apologies again for the rudimentary questions. I’m much more of a circuits/hardware guy and could use ANY advice possible.