False triggering

I’m getting false triggering. I have an XEM3010. End point is as follows:

okTriggerOut ep60 (.ti_clk(ti_clk), .ti_control(ti_control), .ti_data(ti_data), .ep_addr(8’h60), .ep_clk(!adc_clk), .ep_trigger(16’b0));

As you can see the trigger inputs are set to all zeros so even if reset it should never trigger. adc_clk is running at under 1 MHz.

In Labview I update the trigger_out and then call Is_Trig’d to check the first bit. Loop executes every 100 ms. On average I can go about 200 loops until I get a false trigger. I have tried a 1 ms delay between trigger_out and Is_Trig’d however it does not help. Anyone have an idea what’s going on?

check_trigger.JPG (19.8 KB)


We have certainly not seen this behavior before.

Would it be possible for you to put together a very quick XML/XFP file (FrontPanel Profile) to test this within the FrontPanel application? This would isolate the HDL part of the design from anything that may be happening within LabVIEW.

I finally have some free time to mess with my board again. This problem has dissapeared with FP3.01 and latest 3010 firmware.