Is it possible to feed in external clk for the FPGA? I don’t want to use the onboard clock generated from the Cypress PLL.
Can anyone tell me if this is possible? I’m using XEM3010-1500P. Thanks.
Look no further than the XEM3010 User’s Manual!
XCLK1, XCLK2, YCLK1, and YCLK2 on the expansion connector are attached to GCLKs on the Spartan-3.