I have an application where I need to read from two FPGAs simultaneously, each with an output data rate of 125 MB/s.
I have implemented a simple test where each FPGA is populated with a single pipeOut, and I read 512 MB from each FPGA in an alternating fashion. I do this for a long time and measure the bandwidth.
When I use a single FPGA and a single USB 3.0 port, my bandwidth is about 360 MB/s. It is a new computer and quite fast.
When I use two FPGAs, two USB 3.0 cables, and alternate between them my bandwidth is about 355 MB/s.
I had anticipated that the act of switching between the two USB 3.0 ports would take quite a long time and really lower my bandwidth, but this does not seem to be the case. Does this performance seem correct to you, or should I expect a significant bandwidth loss when using multiple devices.